Barebone network switch

problem

PRODUCT DESCRIPTION

Enclosure

Cooling - Active (top blowing)

Power supply - + 12V DC-in (DC Jack & 4-pin ATX PWR)

On/Off button

Reset button

Material - Steel

Dimensions (WxDxH) 200x180x60 mm

Microprocessor

CPU - SoC, Intel Atom® C3000 (C3538/C3758)

Expansion slots

PCIe

PCIe x1

Switch

Switch Controller - FM10000 (Intel)

8 x SFP

CPU Connectivity - PCIe x1 (management), PCIe x4 (data)

Memory

DDR4 2400MHz technology

Maximum available 64GB, dual channel operation

Socket 2 x SODIMM

Disk drives

M.2 1x M.2 (Key M, 2280) SATA for SSD

M.2 NVME 1x M.2 (Key M, 2280) PCIe x4 for SSD

External connectors

RJ-45 Console

USB 2.0 4x

Network (Ethernet)

Interface 10/100/1000 Mbps, 10Gbps

Connectors 2 x SFP +, 8 x SFP +, 2x RJ-45

Solution

PRODUCT DESCRIPTION

The BIOS platform software was developed by Teleplatformy LLC based on Coreboot - a project to create free software for initial hardware initialization and launch of modern 32-bit and 64-bit operating systems.

"Coreboot" replaces the original (proprietary and closed) BIOS of the motherboard without losing basic functionality and ensures the full functioning of hardware components and peripherals. The results of the Coreboot project are distributed under the terms of the GNU GPL v2. - https://github.com/coreboot/coreboot.

The BIOS software is based on the source codes related to the "Harcuvar" platform of the "Intel" company (the base platform for Intel Atom processors of the C3000 Denverton family).

"SeaBios" is used as the bootloader of the operating system.

The platform uses SPI Flash Memory W25Q128FV (WinBond Electronics Corp) with a size of 16 Megabytes as a storage chip for the BIOS ROM file.

For the initial loading of the BIOS ROM file into the platform flash memory chip, it is recommended to use standard SPI Flash programmers (for example, SF100 - https://www.dediprog.com).